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General Introduction to Networking Technologies for the Packet Processing Plane

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Efficiently integrating network hardware and software components to provide a unified solution to support different workloads can be a daunting task within the data center environment.  The network infrastructure typically will include a wide range of network elements (Switches, routers, firewalls, VPN etc.) on different, proprietary architectures with different configuration interfaces and they must operate as an integrated whole.   Deployment, maintenance, integration, vendor support, and scaling to support new and varied requirements are common problems. It is easy to imagine the benefits of being able to design the majority of network functions on a single architecture providing a common code base and development tools.

To solve this problem Intel laid the groundwork with a 4:1 workload consolidation strategy by integrating a unified architecture solution that covers four key communications workloads; Application Processing, Control Processing, Packet Processing, and Signal Processing.  Intel® processors, network adapters, chipsets, and switch silicon work together to tackle the Application and Control Processing Planes. The Intel® QuickAssist Technology, Intel® Data Plane Development Kit (Intel® DPDK), and Hyperscan tools work together to handle functions in the Packet Processing Plane.  Lastly the Intel® Media SDK and Intel® System Studio tool suites assist with integration of the Signal Processing Plane.  From a network and datacenter infrastructure perspective these components can help move from proprietary solutions to a general purpose “off the shelf” solution for savings in cost and maintenance and improvements in flexibility.

Figure 1 – The communications infrastructure consolidates four workloads simultaneously on an Intel® processor based platform.

Hardware Requirements

For best performance in an enterprise environment, you will need Intel® Xeon® E5-2600v2 or better processors with the 8920 to 8950 communications chipset. Together these are the hardware requirements for an optimally performing, unified solution.  For workloads that may not be as processor-intensive, we recommend Intel® Atom™ processor C2000 product family,   specifically product models with an 8 at the end of the product model number (i.e. C2758, C2738, etc.) which include the integrated communications hardware.      

We will focus our discussion on the Packet Processing Plane.  Once you have the required hardware these key components can be utilized to take advantage of the 4:1 strategy:

 

Intel® QuickAssist Technology accelerates cryptographic workloads by offloading the data to hardware capable of optimizing those functions.  This makes it easier for developers to integrate built-in cryptographic accelerators into their designs.  Intel® QuickAssist Technology is enabled for direct access or via open source frameworks.  The integrated hardware acceleration includes support for the following Ciphers: AES, DES/3DES, Kasumi, RC4, Snow3G; Authentication: MD5, SHA1, SHA2, AES-XCBC; Public Key: Diffie-Hellman, RSA, DSA, ECC.

 

 

Intel® Data Plane Development Kit (Intel® DPDK) is a set of optimized data plane software libraries and drivers that can be used to accelerate packet processing on Intel® architecture.  The performance of Intel® DPDK scales with improvements in processor technology from Intel® AtomTM to Intel® Xeon® processors, and is offered under the open source BSD* license.  Intel® DPDK can also be very useful when incorporated within virtualized environments.

A recent trend in software defined networks is increasing demand for fast host based packet handling and a move towards Network Functions Virtualization (NFV).  NFV is a new way to provide network functions such as firewalls, domain name service and network address translation as a fully virtualized infrastructure.  One example of this is Open vSwitch which is an open source solution capable of providing virtual switching.  Intel® DPDK has been combined with Open vSwitch to provide an accelerated experience.  For more information see Intel® DPDK vSwitch.

In the white paper NEC* Virtualized EPC Innovation Powered by Multi Core Intel Architecture Processors, NEC* was able to deploy a virtualized Evolved Packet Core (vEPC), which is a framework for converging data and voice on 4G Long-Term Evolution (LTE) networks, on a common Intel® architecture server platform and achieve carrier grade service.  NEC adopted the Intel® DPDK for its vEPC in order to significantly improve the data plane forwarding performance in a virtualization environment.

Aspera* and Intel investigated ultra-high-speed data transfer solutions built on Aspera’s fasp* transport technology and the Intel® Xeon® processor E5-2600 v3 product family.  The solution was able to achieve predictable ultra-high WAN transfer speeds on commodity Internet connections, on both bare metal and virtualized hardware platforms, including over networks with hundreds of milliseconds of round-trip time and several percentage points of packet loss characteristic of typical global-distance WANs.  By using Intel® DPDK, software engineers were able to reduce the number of memory copies needed to send and receive a packet.  This enabled Aspera to boost single stream data transfer speeds to 37.75 Gbps on the tested system**, which represents network utilization of 39 Gbps, when Ethernet framing and IP packet headers are accounted for.  The team also began preliminary investigation of the transfer performance on virtualized platforms by testing on a kernel-based virtual machine (KVM) hypervisor and obtained initial transfer speeds of 16.1 Gbps.  The KVM solution was not yet NUMA or memory optimized, and thus the team expects to obtain even faster speeds as it applies these optimizations in the future.  For details about performance findings, system specifications, software specifications, etc. see the white paper Big Data Technologies for Ultra-High-Speed data Transfer and Processing

 

 

Hyperscan is a software pattern matching library that can match large groups of regular expressions against blocks or streams of data.  This library is ideal for applications that need to scan large amounts of data at high speed, such as Intrusion Prevention (IPS), Antivirus (AV), Unified Threat Management (UTM) and Deep Packet Inspection (DPI). Hyperscan runs entirely in software and is supported on a wide range of Intel® processors and operating systems. 

Large scale pattern matching can be of value in several areas including deep packet inspection of data in real time. A practical use of this capability is deployment of firewalls with intrusion detection/prevention systems and network anti-virus and malware scanners.  These articles go into a deeper discussion on this topic for both the Intel® AtomTM processor in the white paper Delivering 36Gbps DPI (Pattern Matching) Throughput on the Intel® AtomTM Processor C2000 Product Family using HyperScan and for the Intel® Xeon® processor in the white paper Delivering 160Gbps DPI Performance on the Intel® Xeon® Processor E5-2600 Series using HyperScan.  Intel® DPDK and Intel® QuickAssist can be combined with Hyperscan in these use cases to further increase  network performance and hardware cryptographic offloading such as with Virtual Private Networks.

In addition, using Hyperscan to look at DPI can extend into the virtual environment such as with this example of a Next-Generation IPS on a software-defined data center (SDDC).  Hyperscan is capable of scaling within a virtual environment, allowing you to allocate additional virtual machines as desired to improve performance.  This can be of value in cases where your infrastructure grows over time or when you might need to adjust resources to meet a service level agreement.

Hyperscan is part of Intelligent Network Platform, please contact Wind River* for additional information.

 

 

Resources

Intel® System Studio: Main Website

https://software.intel.com/en-us/intel-system-studio

Intel® System Studio: Signal Processing Use Case

https://software.intel.com/sites/default/files/managed/09/46/signal-processing-with-intel-cilk-plus-2up.pdf

Intel® Media SDK: Main Website

https://software.intel.com/en-us/vcsource/tools/media-sdk-clients

Hyperscan: General Information

http://www.intel.com/content/www/us/en/communications/content-inspection-hyperscan-video.html

Hyperscan: Intel Atom Processor C2000 Product Family Use Case

http://www.intel.com/content/www/us/en/communications/atom-c2000-hyperscan-pattern-matching-brief.html

Hyperscan: Intel Xeon Processor Product Family Use Case

http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/160gbps-dpi-performance-using-intel-architecture-paper.pdf

Hyperscan is Part of Wind River* Intelligent Network Platform

http://www.windriver.com/announces/intelligent-network-platform/

Intel® DPDK: Overview

http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/dpdk-packet-processing-ia-overview-presentation.html

Intel® DPDK: Installation and Configuration Guide

http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/intel-dpdk-getting-started-guide.html.

Intel® DPDK: Programmer’s Guide

http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/intel-dpdk-programmers-guide.html.

Intel® DPDK: API Reference Documentation

http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/intel-dpdk-api-reference.html.

Intel DPDK: Sample Applications

http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/intel-dpdk-sample-applications-user-guide.html.

Intel® DPDK: Latest Source Code Packages for the Intel® DPDK Library

http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/dpdk-source-code.html

Intel® QuickAssist Technology: General information

http://www.intel.com/content/www/us/en/io/quickassist-technology/quickassist-technology-developer.html?wapkw=quick+assist+technology

Intel® Communications Chipset 8900 to 8920 Series Software Programmer’s Guide

http://www.intel.com/content/www/us/en/embedded/technology/quickassist/communications-chipset-8900-8920-software-programmers-guide.html?wapkw=8920

Reference Designs Using Intel Hardware and Software for Network (Intel® Network Builders)

http://networkbuilders.intel.com/

 

** The specifications of the platform are as follows, for more details see this white paper

Big Data Technologies for Ultra-High-Speed data Transfer and Processing.

 

Hardware

  • Intel® Xeon® processor E5-2650 v2 (eight cores at 2.6 GHz with hyperthreading)
  • 128-GB DDR3-1333 ECC (16 x 8 GB DIMM)
  • Twelve Intel® Solid-State Drives DC S3700 series (800GB, 6Gb/s, 2.5" MLC per server)
  • Two Intel® Ethernet Converged Network Adapters X520-DA2 (dual port, 10G NIC with four ports total)
  • Two Intel® Integrated RAID Modules RMS25PB080 (PCIe2 x8 with direct attach to disk)

 

Software

 

  • DPDK 1.4 from dpdk.org
  • Prototype Aspera Fasp* sender and receiver with Intel® DPDK integrated
  • XFS File system
  • 1MB RAID Stripe size for 12MB blocks

 

*Other names and brands may be claimed as the property of others.

 

Notices

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

A "Mission Critical Application" is any application in which failure of the Intel Product could result, directly or indirectly, in personal injury or death. SHOULD YOU PURCHASE OR USE INTEL'S PRODUCTS FOR ANY SUCH MISSION CRITICAL APPLICATION, YOU SHALL INDEMNIFY AND HOLD INTEL AND ITS SUBSIDIARIES, SUBCONTRACTORS AND AFFILIATES, AND THE DIRECTORS, OFFICERS, AND EMPLOYEES OF EACH, HARMLESS AGAINST ALL CLAIMS COSTS, DAMAGES, AND EXPENSES AND REASONABLE ATTORNEYS' FEES ARISING OUT OF, DIRECTLY OR INDIRECTLY, ANY CLAIM OF PRODUCT LIABILITY, PERSONAL INJURY, OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION, WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN, MANUFACTURE, OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS.

Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined". Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information.

The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or go to:  http://www.intel.com/design/literature.htm

Intel, the Intel logo, VTune, Cilk, and Xeon Phi are trademarks of Intel Corporation in the U.S. and other countries.

*Other names and brands may be claimed as the property of others

Copyright© 2012 Intel Corporation. All rights reserved.

 

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products.
 

This sample source code is released under the Intel Sample Source Code License Agreement


 

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors.  These optimizations include SSE2, SSE3, and SSE3 instruction sets and other optimizations.  Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel.

Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors.  Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors.  Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. 

Notice revision #20110804

 


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